Recipient Reason Address Amount Percentage
stefanreinauer Commit ed5642234a:
abuild: Use 12 lines of context for errors

The current default of 6 lines leaves us with no cont...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.7%
stefanreinauer Commit c77e041909:
buildgcc: Disable RISC-V GDB

Our GDB doesn't support RISC-V yet, so let's disable it for now
to ...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.7%
stefanreinauer Commit 266b5171a3:
buildgcc: Bump version to 1.36

Numerous changes have gone in since the last bump, let's increase...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
stefanreinauer Commit 41aa8bc9ab:
Kconfig: Remove unneeded UDELAY_IO redeclaration

UDELAY_IO is defined in src/cpu/x86/Kconfig, so...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
stefanreinauer Commit 9d5e36e839:
cpu/x86: Sort some Kconfig options

Change-Id: I25ea327ed151e18ccb5d13626d44925d2a253d08
Signed-o...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
stefanreinauer Commit 0819a47d14:
northbridge/intel/gm45: Use TSC for ramstage timer per default

This is a step towards isolating ...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
stefanreinauer Commit 7e3903b1f1:
cpu/via/c7: Don't manually include udelay_io.c

Use UDELAY_IO selected by CPU_VIA_C7, so no manua...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
stefanreinauer Commit 3d840d09ae:
northbridge/intel/i440bx: Unify UDELAY selection

Instead of manually including udelay_io.c in ea...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
1HXpzSv1the5 Commit 2e1f73181a:
nb/amd/mct_ddr3: Require minumum training quality for both read and write

The existing MCT code ...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.01 XPM 0.6%
1HXpzSv1the5 Commit 50583f0e1f:
nb/amd/mct_ddr3: Set read DQS delay to 1UI before calculating read latency

The AMD Family 15h BK...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.01 XPM 0.6%
1HXpzSv1the5 Commit 8eb221deaf:
nb/amd/mct_ddr3: Properly initialize arrays and add bounds checks

A couple of arrays were not pr...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.01 XPM 0.6%
1HXpzSv1the5 Commit bbfcf62512:
nb/amd/mct_ddr3: Restore previous DQS delay values on failed loop

Change-Id: Iacfcd7f379d09a6339...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.01 XPM 0.6%
1HXpzSv1the5 Commit ed85f614b0:
nb/amd/mct_ddr3: Consolidate calls to MCT minimum clock setting fetch

Change-Id: I4497b0be6ed6c9...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.01 XPM 0.6%
stefanreinauer Commit 63db6142b6:
northbridge/intel/i82830: Unify UDELAY selection

Instead of manually including udelay_io.c in ea...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
1HXpzSv1the5 Commit 2d987fe0fb:
nb/amd/mct_ddr3: Consolidate duplicated code

read_dqs_read_data_timing_registers() and
read_read...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.01 XPM 0.6%
stefanreinauer Commit 2510e2aa44:
northbridge/intel/i3100: Unify UDELAY selection

Instead of manually including udelay_io.c in eac...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
stefanreinauer Commit e3fd63f264:
northbridge/intel/i82810: Unify UDELAY selection

Instead of manually including udelay_io.c in ea...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
1HXpzSv1the5 Commit bc5ad1087b:
nb/amd/mct_ddr3: Use correct initial UI setting during DRAM training

Rebasing change I3be808db5d...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.01 XPM 0.5%
stefanreinauer Commit 805d44f2c7:
libpayload: Fix ARM workaround code

_LDFLAGS+="foo" did not work in my shell (bash on Ubuntu 15....
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.5%
stefanreinauer Commit f0acf47ae1:
libpayload: Add comment about ARM64 exception stack

Change-Id: I8b74cbf6bdde32c90ad0510e14e89971...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.5%
stefanreinauer Commit 31575f6391:
coreinfo: Pretty print RAM addresses

Instead of 500, print 0x00000500 in the ram dump module.

C...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.5%
stefanreinauer Commit 1e6b86b8b6:
libpayload: Move MEMMAP_RAM_ONLY to generic options

MEMMAP_RAM_ONLY is not an architecture speci...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.5%
stefanreinauer Commit 8fda04449f:
libpayload: Drop CONFIG_LP_CHROMEOS

This is adding complexity to the code more than it saves
spa...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.5%
stefanreinauer Commit 96d14ac1c9:
libpayload: Unify defconfigs

Bring defconfig and defconfig-tinycurses in sync, so that
defconfig...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.5%
stefanreinauer Commit 80547369ea:
coreinfo: Use tinycurses

When using PDcurses over a serial line, the background of
coreinfo is n...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.5%
stefanreinauer Commit 9125073d2a:
payloads: Enable building depthcharge as part of the coreboot build

For CHROMEOS builds, depthch...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.5%
stefanreinauer Commit 821844534c:
libpayload: Move base address, stack and heap size to Kconfig

This will allow more payloads to u...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.5%
stefanreinauer Commit 347a7529aa:
libpayload: Make comment into help text

Change-Id: I8c8669e73e335e12cb3785cf84b878c305dd5929
Sig...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.5%
stefanreinauer Commit 94534b3132:
libpayload: recreate config files

Add all the default options with:

  for i in configs/*
  do
 ...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.5%
stefanreinauer Commit 62af53fe10:
coreinfo: Rename libpayload variables

LIBCONFIG_PATH -> LIBPAYLOAD_PATH
LIBPAYLOAD_DIR -> LIBPAY...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.5%
stefanreinauer Commit c2b50ace1b:
coreinfo: Allow numbers in addition to F keys

When using coreinfo on a serial console (at least
...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.5%
1HXpzSv1the5 Commit f1d807c5c6:
nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_SW_Fam15()

Change-I...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.00 XPM 0.5%
stefanreinauer Commit 044e4b5745:
soc/samsung: Don't compile in unused uart divider tables

Change-Id: I58b2c3c52444d9a755d05529992...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.5%
1HXpzSv1the5 Commit 99894127ab:
mainboard/asus/[kgpe-di6|kcma-d8]: Fix board ROM information

The board information file incorrec...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.00 XPM 0.5%
1HXpzSv1the5 Commit 84da72c988:
nb/amd/mct_ddr3: Report correct DIMM size in SMBIOS structure

The existing DIMM size calculation...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.00 XPM 0.5%
1HXpzSv1the5 Commit 251ce85b58:
smbios: Add SuperTalent SPD ID

Change-Id: I5373be7ab55ac3c4f2e4dd753c6ad8e91712ff7e
Signed-off-b...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.00 XPM 0.4%
1HXpzSv1the5 Commit d112f46bed:
nb/amd/mct_ddr3: Add support for non-ECC DIMMs on AMD Family 15h

While some stubs existed before...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.00 XPM 0.4%
stefanreinauer Commit 0b4db13994:
vendorcode/intel/fsp1_0: Don't break GCC strict aliasing

Change-Id: I6b345670db7df652b8b712b721d...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.4%
stefanreinauer Commit 1eaf58be2c:
HobLib: Don't break GCC strict aliasing

Change-Id: I1bd33e423b0fcb69597e001b61c6ea916f5fe44a
Sig...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.4%
stefanreinauer Commit 4bab6e79b0:
intel/sch: Merge northbridge and southbridge in src/soc

Change-Id: I6ea9b9d2353c0d767c837e6d629b...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.4%
1HXpzSv1the5 Commit 9891b4a28b:
sio/winbond: Expose enter/exit configuration state functions

Certain mainboards, e.g. the ASUS K...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.00 XPM 0.4%
stefanreinauer Commit f6b1039f86:
program.ld: Don't exclude sbe region from verstage

This fixes compilation of coreboot on Glados
...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.4%
1HXpzSv1the5 Commit ca543396a7:
mainboard/asus/[kgpe-d16|kcma-d8]: Enable secondary serial port header

The ASUS KGPE-D16/KCMA-D8...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.00 XPM 0.4%
stefanreinauer Commit 28434a9ca7:
util/chromeos: Make scripts executable

crosfirmware.sh and extract_blobs.sh are not executable, ...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.4%
stefanreinauer Commit 9071670a84:
nvidia/tegra124: Adjust memlayout to Chrome OS toolchain

The bootblock gets slightly too big, so...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.4%
stefanreinauer Commit dd65ef86c3:
.gitignore: Ignore Python object files

Ignore .pyc files, such as util/ipqheader/mbn_tools.pyc

...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.4%
minipli Commit 901efea8ab:
libpayload: x86/exec - fix return value passing

The pointer to write the return value to is in %...
AREqogkJTfeb1QvcWrskNXupbgnaMfaPsd 0.00 XPM 0.4%
minipli Commit d42c38b93c:
libpayload: x86/exec - fix libpayload API magic value

According to coreboot’s payload API [1] th...
AREqogkJTfeb1QvcWrskNXupbgnaMfaPsd 0.00 XPM 0.4%
minipli Commit 898de6111a:
libpayload: multiboot - support meminfo flag

Some simple implementation of the MultiBoot protoco...
AREqogkJTfeb1QvcWrskNXupbgnaMfaPsd 0.00 XPM 0.4%
minipli Commit d2f16cac74:
libpayload: x86/head - implement argc/argv handling

Implement the argc/argv passing as described...
AREqogkJTfeb1QvcWrskNXupbgnaMfaPsd 0.00 XPM 0.4%
minipli Commit 57dc93c967:
libpayload: x86/exec - simplify and robustify the code

Simplify the code by directly using the a...
AREqogkJTfeb1QvcWrskNXupbgnaMfaPsd 0.00 XPM 0.4%
minipli Commit 7b681c5926:
libpayload: x86/main - propagate return value of main()

According to coreboot’s payload API [1],...
AREqogkJTfeb1QvcWrskNXupbgnaMfaPsd 0.00 XPM 0.4%
minipli Commit 9fa78c136d:
libpayload: x86/exec - fix argc/argv value passing

According to coreboot’s payload API [1] the a...
AREqogkJTfeb1QvcWrskNXupbgnaMfaPsd 0.00 XPM 0.4%
stefanreinauer Commit 9b1936dc82:
buildgcc: Use $(CURDIR) instead of $(PWD)

coreboot's top level Makefile does the same, so let's ...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.7%
stefanreinauer Commit f466ea97bf:
crossgcc: Build make per default

Build make with the rest of the toolchain, since the targets us...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.6%
1HXpzSv1the5 Commit 10d6fceaa0:
nb/amd/mct_ddr3: Train correct receiver in TrainDQSRdWrPos_D_Fam15

Change-Id: Ia26950a8297f0a712...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.01 XPM 0.6%
stefanreinauer Commit 730d47537e:
x86: Drop CONFIG_COMPILE_IN_DSDT

This option is no longer needed, as FMAP support has been
fully...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.01 XPM 0.5%
1HXpzSv1the5 Commit f7d4f73053:
nb/amd/amdmct/mct_ddr3: Ensure BlockRxDqsLock does not remain set

Under certain conditions (trai...
AJUPMA89f2DLVQcEERfiNzBrj7pbvWseyM 0.00 XPM 0.5%
stefanreinauer Commit 1bf00079c1:
flashmap: Allocate at least one entry in kv_pair_new()

Change-Id: I971fa85ed977884d050790560a5a8...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.00 XPM 0.4%
stefanreinauer Commit ca117e7f49:
crossgcc: Update to clang 4.0

Drop Edward's cfe patch because it has been implemented by
upstrea...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.36 XPM 35.3%
stefanreinauer Commit 3b5934936e:
Add CMake 3.9.0-rc3 to coreboot toolchain

Newer versions of clang will need newer versions of CM...
AYiNwMUwKeqXwX6abR19Q1DCJckgceMVUF 0.35 XPM 34.9%

Total amount: 1.01 XPM

Transaction sent on Wed, 21 Jun 2017 22:16:28 +0000